Software - My CPU - Spec
The machine consists of 65536 16-bit words of ram and the following registers:
A, B, C, D (value registers)
I, J, K, L (pointer registers)
PC (program counter)
SP (stack pointer)
EX (extra/overflow register)
Instructions
Instructions consist of an operator and (typically) two operands: the source and the target. The source and target operands are five bits long each and the operator is 6 bits, in the following arrangement: ssssstttttoooooo (the source is in the most significant bits, and the operator is in the least significant bits).
Operands specified in brackets indicate the value found in main memory at the address specified within the brackets. A ++ or -- before a value means it will be incremented or decremented and then the value taken. After means its value will be taken first and then it will be incremented or decremented
Some operands indicate that the next word will be used. If both operands require a next word, target will get the first one and source will get the following one.
| operand | value |
|---|---|
| 0x00 | (reserved) |
| 0x01 | [next word] |
| 0x02 | PC |
| 0x03 | (reserved) |
| 0x04-0x06 | 0, 1, 2 (literal) |
| 0x07 | next word (literal) |
| 0x08 | SP |
| 0x09 | [SP+next word] |
| 0x0a | [++SP] as a source, or [SP--] as a target (POP and PUSH) |
| 0x0b | EX |
| 0x0c-0x0f | A, B, C, D |
| 0x10-0x13 | I, J, K, L |
| 0x14-0x17 | [I], [J], [K], [L] |
| 0x18-0x1b | [I++], [J++], [K++], [L++] |
| 0x1c-0x1f | [I+next word], [J+next word], [K+next word], [L+next word] |
Operations
| oper. | abbrev. | description |
|---|---|---|
| 0x0001 | MOV | |
| 0x0002 | CAL | Pushes PC on to the stack and sets PC to s |
| 0x0004 | INT | Send interrupt to hardware with a word of data |
| 0x0005 | IRT | Sets PC to [++SP] and resumes interrupt processing |
| 0x0008 | JE | Adds next word to PC if t==s |
| 0x0009 | JNE | Adds next word to PC if t!=s |
| 0x000a | JLT | Adds next word to PC if t<s |
| 0x000b | JLE | Adds next word to PC if t<=s |
| 0x000c | JLS | Adds next word to PC if t<s (signed) |
| 0x000d | JQS | Adds next word to PC if t<=s (signed) |
| 0x0010 | SHL | Sets t to t<<s, sets EX to ((t<<s)>>16)&0xffff |
| 0x0011 | SHR | Sets t to t>>s, sets EX to ((t<<16)>>s)&0xffff |
| 0x0012 | SLC | Shift left with carry, set t to (t<<s)+EX, set EX as above |
| 0x0013 | SHR | Shift right with carry, set t to (t>>s)+EX, set EX as above |
| 0x0014 | AND | Sets t to t&s |
| 0x0015 | OR | Sets t to t|s |
| 0x0016 | XOR | Sets t to t^s |
| 0x0017 | NEG | Sets t to ~t+s, sets EX to 0x0001 on overflow, else 0x0000 |
| 0x0018 | ADD | Sets t to t+s, sets EX to 0x0001 on overflow, else 0x0000 |
| 0x0019 | SUB | Sets t to t-s, sets EX to 0xffff on underflow, else 0x0000 |
| 0x001a | ADC | Sets t to t+s+EX, sets EX to 0x0001 on overflow, else 0x0000 |
| 0x001b | SBC | Sets t to t-s+EX, sets EX to 0xffff on underflow, else 0x0000 |
| 0x001c | MUL | Sets EX:t to t*s, unsigned |
| 0x001d | DIV | Sets t to t/s, sets EX to t%s, unsigned |
| 0x001e | MLS | Sets EX:t to t*s, signed |
| 0x001f | DVS | Sets t to t/s, sets EX to t%s, signed |
Jump instructions require reading a next word. it will be taken after any required for operands.
Hardware
Up to 63 hardware devices can be attached to the computer at once. When the computer is started up it scans the connected devices and builds a list of them starting at memory address 0x0000. The number of connected devices will be stored at address 0x0000. Starting at address 0x0004 there will be n device descriptors. Descriptors are four words long. The first two words contain a 32-bit (little endian) ID that specifies the make, model, and version of the hardware. The next word is the interrupt address for signals from that device. When the device triggers an interrupt normal program execution will be halted and execution will jump to this address. This value will be initialized to 0. To handle interrupts from that device you must point that value to code to handle it. If the address found there is 0, no handler will be invoked and the interrupt will be ignored. The last word is reserved. The device listed at 0x0004 will be considered device number 1.
When an interrupt is received it will be identified by the device number. If that device descriptor contains a nonzero interrupt address then processing of further interrupts is suspended, PC is pushed to [SP--], and PC is set to the interrupt address. While interrupt processing is suspended, interrupts are added to a hardware queue. At most 64 interrupts may be queued at once. When code is done processing the interrupt, use IRT (interrupt return, 0x0005) to pop the PC back off the stack and allow interrupt processing to resume.
To send a signal to hardware use INT (0x0004). Specify the device number in t. That device will receive s as a message. The device may use that word of data however it wishes (as an instruction itself or as a pointer to a structure). Hardware devices also have access to all registers and main memory and can read from and write to those as well.
Start Up
When the computer is started connected hardware will be scanned and documented as described in the Hardware section. SP will be intialized to 0xffff. PC will be initialized to 0x0100 and execution will begin there.
Simple Monitor
This monochrome monitor has an 80 x 45 character display of 6 x 8 pixel characters, for a total screen resolution of 480 x 360 pixels. When it receives an interrupt it will activate the screen and interpret the word of data sent to it as an address to use for screen memory. From that base address, it will access 3600 words and display that data on the screen. The first 80 words will form the first row of text on the screen. Subsequent groups of 80 form the following lines. Only the lower 7 bits of each word are used, and the corresponding ASCII character is displayed. If it receives an interrupt and is sent an address of 0, it will deactivate the screen and stop displaying anything.